Process Catalog

JPEG - 159.3 kbCMP is a service organization in ICs and MEMS for prototyping and low volume productions.

  • CMP provides several regular and advanced CMOS technologies. BiCMOS RF, High voltage and Smart power are among our Specialty technology portfolio.
  • CMP provides two types of MEMS technologies for prototyping: Integrated bulk micromachining technologies and specific surface micromachining technologies.

Since 1981, 614 customers from 70 countries have been served, more than 7900 projects have been prototyped through 1043 runs and 72 different technologies have been interfaced.
Some history data are available on this link

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IC 28nm CMOS28FDSOI

STMicroelectronics
Advanced CMOS FDSOI technology with 8 metal layers
Next run: 2019/10/21

IC 55nm BiCMOS055

STMicroelectronics
BiCMOS SiGe technology with 8 metal layers
Next run: 2019/08/19

IC 65nm CMOS065

STMicroelectronics
Advanced CMOS technology with 7 metal layers
Next run: 2019/09/30

IC 130nm BiCMOS9MW

STMicroelectronics
BiCMOS SiGe technology with 6 metal layers
Next run: 2019/11/04

IC 130nm H9SOI-FEM

STMicroelectronics
Advanced CMOS SOI technology with 4 metal layers
Next run: 2019/09/30

IC 130nm HCMOS9GP

STMicroelectronics
CMOS technology with 6 metal layers
Next run: 2019/11/04

IC 130nm HCMOS9A

STMicroelectronics
CMOS High Voltage technology with 4 metal layers
Next run: 2019/11/07

IC 0.16µm BCD8sP

STMicroelectronics
BCD High Voltage technology with 4 metal layers
Next run: 2019/10/02

IC 0.16µm BCD8s-SOI

STMicroelectronics
BCD SOI High Voltage technology with 4 metal layers
Next run: 2019/10/02

IC 0.35µm BARC C35B4OA

ams
CMOS Opto BARC technology with 4 metal layers, Enhanced optical sensitivity for embedded photodiodes and high density CMOS camera products.
Next run: 2019/11/18

IC 0.35µm C35B4C3

ams
CMOS technology with 4 metal layers, Mixed signal analog digital, large digital designs, system on chip
Next run: 2019/11/18

IC 0.35µm ARC C35B4O1

ams
CMOS Opto ARC technology with 4 metal layers, Provides enhanced optical sensitivity for embedded photodiodes and high density CMOS camera products.
Next run: 2019/11/18

IC 0.35µm RF C35B4M3

ams
CMOS RF technology with 4 metal layers, Mixed signal analog digital, large digital designs, system on chip, RF.
Next run: 2019/10/14

IC 0.35µm H35B4D3

ams
CMOS High Voltage technology with 4 metal layers, Mixed signal analog digital, HV designs, system on chip
Next run: 2019/09/30

IC 0.35µm C35B4E3

ams
CMOS technology with 4 metal layers, The process is fully compatible with C35B4C3 Mixed signal analog digital, large digital designs, system on chip

IC 0.35µm S35D4M5

ams
BiCMOS SiGe technology with 4 metal layers, Mixed signal analog/RF/digital, large digital designs, system on chip
Next run: 2019/10/14

MEMS Specific MEMS technologies PolyMUMPs

MEMSCAP
MEMS MUMPS, MEMS, micromechanics, MOEMS.
Next run: 2019/10/01

MEMS Specific MEMS technologies SOIMUMPs

MEMSCAP
MEMS MUMPS, MEMS, micromechanics, MOEMS
Next run: 2019/09/04

MEMS Specific MEMS technologies PiezoMUMPs

MEMSCAP
MEMS PiezoMUMPS, MEMS, micromechanics, MOEMS
Next run: 2019/09/10

MEMS Bulk Micromachining Frontside Bulk Micromachining

ams
CMOS FS Bulk Micromachining technology with 4 metal layers, MEMS, micromechanics, MOEMS.

MEMS Bulk Micromachining Backside Bulk Micromachining

ams
CMOS BS Bulk Micromachining technology with 4 metal layers

MEMS TDSI MIDIS TM MIDIS

TELEDYNE DALSA
MEMS, Accelerometers Gyroscopes Resonators Inertial sensor combos (Sensor fusion)

OPEN 3D Frontside UBM post-process

IRT Nanoelec/LETI-CEA
Wafer-level packaging, 3D/2.5D integration

OPEN 3D Frontside Micro-Bumps post-process

IRT Nanoelec/LETI-CEA
Wafer-level packaging, 3D/2.5D integration

OPEN 3D Frontside Bumps post-process

IRT Nanoelec/LETI-CEA
Wafer-level packaging Flip-Chip Packaging, Single die flip-chip, 3D/2.5D integration

OPEN 3D Backside post-process (TSV, RDL & Bumps)

IRT Nanoelec/LETI-CEA
Wafer-level packaging, 3D/2.5D integration

Passive Silicon Interposer with UBM

ams
Si-Interposer technology with 4 metal layers, Passive Silicon Si-Interposer for 3D/2.5D integration

ams 0.35 Wafer-level bumping

ams
Flip-Chip Packaging, Single die flip-chip packaging

Silicon Photonic IC Si310-PHMP2M

IRT Nanoelec/LETI-CEA
Silicon Photonic technology with 2 metal layers, Telecom, DataCom, ComputerCom
Next run: 2019/10/30

0.35µm Active Silicon Interposer with UBM

ams
Si-Interposer technology with 4 metal layers, Active Silicon Si-Interposer for 3D/2.5D integration

Gold stud-bumping

IRT Nanoelec/LETI-CEA
Flip-Chip Packaging, Single die flip-chip packaging

Solder bumping post process

IRT Nanoelec/LETI-CEA
Flip-Chip Packaging Wafer-level packaging, Flip-chip packaging

OPEN 3D Frontside Micro-Bumps post-process

IRT Nanoelec/LETI-CEA
Flip-Chip Packaging, 3D/2.5D integration

MAD200 Memory Advanced Demonstrator 200mm

IRT Nanoelec/LETI-CEA
CMOS NVM, Storage Class memory, Embedded memory, Neuromorphic, Computing, Artificial Intelligence accelerator.

IC ON Semiconductor 0.18µm CMOS ONC18MS

ON Semiconductor
CMOS technology with 5 metal layers, Highly integrated high voltage mixed signal processes ideal for many automotive, industrial, medical and defense applications
Next run: 2019/10/07

IC ON Semiconductor 0.18µm CMOS HV ONC18I4T

ON Semiconductor
CMOS High Voltage technology with 5 metal layers, High-voltage automotive applications thanks to Deep Trench Isolation (DTI)
Also serves as a platform for highly integrated high voltage mixed signal processes ideal for many industrial applications.
Next run: 2019/10/07

IC ON Semiconductor 0.35µm CMOS ONC35U

ON Semiconductor
CMOS technology with 4 metal layers, Mixed signal designs requiring a moderate amount of digital logic (up to 250k gates)
Next run: 2019/09/16

IC ON Semiconductor 0.35µm CMOS HV ONC35I3T25U

ON Semiconductor
CMOS High Voltage technology with 4 metal layers, Increased digital content in a mixed signal and/or high voltage environment
  • 3 and 5 metal layers options (thick top metal)
  • Additional options on request: HIPO, MiM capacitor, Epi
Next run: 2019/09/16

IC ON Semiconductor 0.35µm CMOS HV ONC35I3T50U

ON Semiconductor
CMOS High Voltage technology with 4 metal layers, Increased digital content in a mixed signal and/or high voltage environment
  • 3 and 5 metal layers options (thick top metal)
  • Additional options on request: MiM capacitor, HIPO, Polyimide
Next run: 2019/09/02