IC 28nm CMOS28FDSOI
STMicroelectronics
Advanced CMOS FDSOI technology with 8 metal layers
Advanced CMOS FDSOI technology with 8 metal layers
Next run: 2019/01/02
IC 0.18µm aC18A6
ams
CMOS technology with 6 metal layers, for Power management applications MEMS and Sensor interfaces Other SOC applications in Medical, Automotive and Industrial High performance mixed analog/digital applications
CMOS technology with 6 metal layers, for Power management applications MEMS and Sensor interfaces Other SOC applications in Medical, Automotive and Industrial High performance mixed analog/digital applications
IC 0.18µm aH18A6
ams
CMOS High Voltage technology with 6 metal layers, for Mixed signal analog digital, HV designs, system on chip
CMOS High Voltage technology with 6 metal layers, for Mixed signal analog digital, HV designs, system on chip
IC 0.35µm BARC C35B4OA
ams
CMOS Opto BARC technology with 4 metal layers, for Provides enhanced optical sensitivity for embedded photodiodes and high density CMOS camera products.
CMOS Opto BARC technology with 4 metal layers, for Provides enhanced optical sensitivity for embedded photodiodes and high density CMOS camera products.
IC 0.35µm C35B4C3
ams
CMOS technology with 4 metal layers, for Mixed signal analog digital, large digital designs, system on chip
CMOS technology with 4 metal layers, for Mixed signal analog digital, large digital designs, system on chip
IC 0.35µm ARC C35B4O1
ams
CMOS Opto ARC technology with 4 metal layers, for Provides enhanced optical sensitivity for embedded photodiodes and high density CMOS camera products.
CMOS Opto ARC technology with 4 metal layers, for Provides enhanced optical sensitivity for embedded photodiodes and high density CMOS camera products.
IC 0.35µm RF C35B4M3
ams
CMOS RF technology with 4 metal layers, for Mixed signal analog digital, large digital designs, system on chip, RF.
CMOS RF technology with 4 metal layers, for Mixed signal analog digital, large digital designs, system on chip, RF.
Next run: 2018/12/11
IC 0.35µm H35B4D3
ams
CMOS High Voltage technology with 4 metal layers, for Mixed signal analog digital, HV designs, system on chip
CMOS High Voltage technology with 4 metal layers, for Mixed signal analog digital, HV designs, system on chip
IC 0.35µm C35B4E3
ams
CMOS technology with 4 metal layers, for The process is fully compatible with C35B4C3 Mixed signal analog digital, large digital designs, system on chip
CMOS technology with 4 metal layers, for The process is fully compatible with C35B4C3 Mixed signal analog digital, large digital designs, system on chip
IC 0.35µm S35D4M5
ams
BiCMOS SiGe technology with 4 metal layers, for Mixed signal analog/RF/digital, large digital designs, system on chip
BiCMOS SiGe technology with 4 metal layers, for Mixed signal analog/RF/digital, large digital designs, system on chip
Next run: 2018/12/11
MEMS Specific MEMS technologies PolyMUMPs
MEMSCAP
MEMS MUMPS, for MEMS, micromechanics, MOEMS.
MEMS MUMPS, for MEMS, micromechanics, MOEMS.
Next run: 2019/01/15
MEMS Specific MEMS technologies PiezoMUMPs
MEMSCAP
MEMS PiezoMUMPS, for MEMS, micromechanics, MOEMS
MEMS PiezoMUMPS, for MEMS, micromechanics, MOEMS
Next run: 2019/01/29
MEMS Bulk Micromachining Frontside Bulk Micromachining
ams
CMOS FS Bulk Micromachining technology with 4 metal layers, for MEMS, micromechanics, MOEMS.
CMOS FS Bulk Micromachining technology with 4 metal layers, for MEMS, micromechanics, MOEMS.
MEMS Bulk Micromachining Backside Bulk Micromachining
ams
CMOS BS Bulk Micromachining technology with 4 metal layers
CMOS BS Bulk Micromachining technology with 4 metal layers
MEMS TDSI MIDIS TM MIDIS
TELEDYNE DALSA
MEMS, for Accelerometers Gyroscopes Resonators Inertial sensor combos (Sensor fusion)
MEMS, for Accelerometers Gyroscopes Resonators Inertial sensor combos (Sensor fusion)
OPEN 3D Frontside UBM post-process
IRT Nanoelec/LETI-CEA
Wafer-level packaging, for 3D/2.5D integration
Wafer-level packaging, for 3D/2.5D integration
OPEN 3D Frontside Micro-Bumps post-process
IRT Nanoelec/LETI-CEA
Wafer-level packaging, for 3D/2.5D integration
Wafer-level packaging, for 3D/2.5D integration
OPEN 3D Frontside Bumps post-process
IRT Nanoelec/LETI-CEA
Wafer-level packaging Flip-Chip Packaging, for Single die flip-chip, 3D/2.5D integration
Wafer-level packaging Flip-Chip Packaging, for Single die flip-chip, 3D/2.5D integration
OPEN 3D Backside post-process (TSV, RDL & Bumps)
IRT Nanoelec/LETI-CEA
Wafer-level packaging, for 3D/2.5D integration
Wafer-level packaging, for 3D/2.5D integration
Passive Silicon Interposer with UBM
ams
Si-Interposer technology with 4 metal layers, for Passive Silicon Si-Interposer for 3D/2.5D integration
Si-Interposer technology with 4 metal layers, for Passive Silicon Si-Interposer for 3D/2.5D integration
Silicon Photonic ICs Si310-PHMP2M
IRT Nanoelec/LETI-CEA
Si-Photonics technology with 2 metal layers, for Telecom, DataCom, ComputerCom
Si-Photonics technology with 2 metal layers, for Telecom, DataCom, ComputerCom
0.35µm Active Silicon Interposer with UBM
ams
Si-Interposer technology with 4 metal layers, for Active Silicon Si-Interposer for 3D/2.5D integration
Si-Interposer technology with 4 metal layers, for Active Silicon Si-Interposer for 3D/2.5D integration
Solder bumping post process
IRT Nanoelec/LETI-CEA
Flip-Chip Packaging Wafer-level packaging, for Flip-chip packaging
Flip-Chip Packaging Wafer-level packaging, for Flip-chip packaging
OPEN 3D Frontside Micro-Bumps post-process
IRT Nanoelec/LETI-CEA
Flip-Chip Packaging, for 3D/2.5D integration
Flip-Chip Packaging, for 3D/2.5D integration
MAD200 Memory Advanced Demonstrator 200mm
IRT Nanoelec/LETI-CEA
CMOS NVM, for Storage Class memory, Embedded memory, Neuromorphic, Computing, Artificial Intelligence accelerator.
CMOS NVM, for Storage Class memory, Embedded memory, Neuromorphic, Computing, Artificial Intelligence accelerator.
