Process Catalog - CMP: Circuits Multi-Projets

ams
CMOS Opto BARC technology with 4 metal layers, for Provides enhanced optical sensitivity for embedded photodiodes and high density CMOS camera products.

Next run: 2019/05/13

IC 0.35µm C35B4C3

ams
CMOS technology with 4 metal layers, for Mixed signal analog digital, large digital designs, system on chip

Next run: 2019/05/13

IC 0.35µm ARC C35B4O1

ams
CMOS Opto ARC technology with 4 metal layers, for Provides enhanced optical sensitivity for embedded photodiodes and high density CMOS camera products.

Next run: 2019/05/13

IC 0.35µm RF C35B4M3

ams
CMOS RF technology with 4 metal layers, for Mixed signal analog digital, large digital designs, system on chip, RF.

Next run: 2019/03/18

IC 0.35µm H35B4D3

ams
CMOS High Voltage technology with 4 metal layers, for Mixed signal analog digital, HV designs, system on chip

Next run: 2019/03/05

IC 0.35µm C35B4E3

ams
CMOS technology with 4 metal layers, for The process is fully compatible with C35B4C3 Mixed signal analog digital, large digital designs, system on chip

IC 0.35µm S35D4M5

ams
BiCMOS SiGe technology with 4 metal layers, for Mixed signal analog/RF/digital, large digital designs, system on chip

Next run: 2019/03/18

MEMS Specific MEMS technologies PolyMUMPs

MEMSCAP
MEMS MUMPS, for MEMS, micromechanics, MOEMS.

Next run: 2019/04/09

MEMS Specific MEMS technologies SOIMUMPs

MEMSCAP
MEMS MUMPS, for MEMS, micromechanics, MOEMS

Next run: 2019/03/05

MEMS Specific MEMS technologies PiezoMUMPs

MEMSCAP
MEMS PiezoMUMPS, for MEMS, micromechanics, MOEMS

Next run: 2019/05/21

MEMS Bulk Micromachining Frontside Bulk Micromachining

ams
CMOS FS Bulk Micromachining technology with 4 metal layers, for MEMS, micromechanics, MOEMS.

MEMS Bulk Micromachining Backside Bulk Micromachining

ams
CMOS BS Bulk Micromachining technology with 4 metal layers

MEMS TDSI MIDIS ^TM MIDIS

TELEDYNE DALSA
MEMS, for Accelerometers Gyroscopes Resonators Inertial sensor combos (Sensor fusion)

OPEN 3D Frontside UBM post-process

IRT Nanoelec/LETI-CEA
Wafer-level packaging, for 3D/2.5D integration

OPEN 3D Frontside Micro-Bumps post-process

IRT Nanoelec/LETI-CEA
Wafer-level packaging, for 3D/2.5D integration

OPEN 3D Frontside Bumps post-process

IRT Nanoelec/LETI-CEA
Wafer-level packaging Flip-Chip Packaging, for Single die flip-chip, 3D/2.5D integration

OPEN 3D Backside post-process (TSV, RDL & Bumps)

IRT Nanoelec/LETI-CEA
Wafer-level packaging, for 3D/2.5D integration

Passive Silicon Interposer with UBM

ams
Si-Interposer technology with 4 metal layers, for Passive Silicon Si-Interposer for 3D/2.5D integration

ams 0.35 Wafer-level bumping

ams
Flip-Chip Packaging, for Single die flip-chip packaging

Silicon Photonic ICs Si310-PHMP2M

IRT Nanoelec/LETI-CEA
Si-Photonics technology with 2 metal layers, for Telecom, DataCom, ComputerCom

Next run: 2019/04/02

0.35µm Active Silicon Interposer with UBM

ams
Si-Interposer technology with 4 metal layers, for Active Silicon Si-Interposer for 3D/2.5D integration

Gold stud-bumping

IRT Nanoelec/LETI-CEA
Flip-Chip Packaging, for Single die flip-chip packaging

Solder bumping post process

IRT Nanoelec/LETI-CEA
Flip-Chip Packaging Wafer-level packaging, for Flip-chip packaging

OPEN 3D Frontside Micro-Bumps post-process

IRT Nanoelec/LETI-CEA
Flip-Chip Packaging, for 3D/2.5D integration

MAD200 Memory Advanced Demonstrator 200mm

IRT Nanoelec/LETI-CEA
CMOS NVM, for Storage Class memory, Embedded memory, Neuromorphic, Computing, Artificial Intelligence accelerator.

Next run: 2019/06/15

STMicroelectronics Wafer-level bumping on 300mm, ST 55nm BiCMOS055, ST 65nm CMOS065 and on ST 28nm CMOS28FDSOI processes

STMicroelectronics
Wafer-level packaging, for Single die flip-chip packaging