Beam-Steering Receiver Front-End

Run reference : S28I18_1 - IC STMicroelectronics 28nm Advanced CMOS FDSOI 8 ML CMOS28FDSOI (datasheet)

S28I18_1 smrp_top_gds

The chip is designed to do coherent combination required for beam-steering. Two test RF signals are input to the chip with delay between them. The delay is used in the test setup to mimic an antenna structure. The signals are down-converted before combination. The main output signal is a baseband signal after combination. Blocks implemented on the chip include, mixers, baseband amplifiers, samplers and output buffers. The receiver demonstrates a novel pulsed LO generation circuitry. A synthesized digital block controls the chip.