IC 0.35µm CMOS HV ONC35I3T25U

IC ON Semiconductor 0.35µm CMOS High Voltage 4 ML ONC35I3T25U

TECHNOLOGY CHARACTERISTICS :

Met. layer(s): 4, thick top metal
Poly layer(s) : 2
Available I/O : I/O standard cell libraries for core and pad limited designs
Temp. range : -40°C/+155°C
Supply voltage : 3.3V/12V

SPECIAL FEATURES :

25V HV technology

APPLICATION AREA :

Answer to the need for increased digital content in a mixed signal and/or high voltage environment
3 and 5 metal layers options (thick top metal)
Additional options on request: HIPO, MiM capacitor, Epi

DESIGN KIT VERSION :

Cadence 5

Frontend Backend tools :

Synopsys Design Compiler and Cadence Verilog(for digital design);Cadence DFII(4.4.6) and Spectre(for analog design)

Simulation tools :

Spectre,Eldo and HSpice (analog simulation)

Verification tools :

Mentor Calibre

Place route tools :

Synopsys Apollo and Cadence Silicon Ensemble

LIBRARIES :

For standard cell :
ultra high density core shell
core cell level shifters

For standard I/O :
fat pad I/O library (for core limited designs)
tall pad I/O library (for pad limited designs)

MEMORY OPTIONS :

Synchronous high speed/high temp single port SRAM
Synchronous high speed/high temp dual port SRAM
Low power synchronous SRAM
Synchronous high speed/high temp diffusion ROM
Low power synchronous via programmable ROM
One-Time Programmable (OTP)
EEPROM (no additional masks or processing steps)