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Provides readers with a single-source reference to Body-Biasing Techniques for FDSOI Circuits and Systems.
Describes integrated circuit design techniques specific to deep submicron Ultra Thin Body and Box Fully-Depleted Silicon on Insulator CMOS technology.
Presents the first coherent collection of FDSOI specific design techniques, for applications ranging from analog, RF, mmW to SRAM design, embedded power management and energy efficient digital design.
Book to come on show at Springer booth, during next ISSCC !
28nm FD-SOI technology has been offered for access through CMP since 2012, and that more than 240 circuits have been taped out successfully (including the R&D ones cited in the book).